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Add support for AD4052 ADC Family #2642

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Add support for AD4052 ADC Family #2642

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@gastmaier gastmaier commented Nov 1, 2024

PR Description

Add:

  • driver support for D4052/AD4058/AD4050/AD4056 (16-bit/12-bit SAR ADC SPI)
  • devicetree binding

Optional:

  • sample devicetree for coraz7s
  • kconfig imply driver

Features:

  • Single shot using gpio as ADC CNV
  • Buffer readings using AXI PWM ADC CNV and ADC GP1 Data Ready as AXI SPI Engine Offload Trigger
  • Monitor mode with ADC GP0 as interrupt trigger (either IIO threshold direction event)
    • User should do register access to get event details.
  • Functional modes via oversampling config: Sample Mode (0/1) or Burst Averaging Mode (>1)
    • Burst Avg enables configuring averaging filter length value (AVG_CONFIG.AVG_WIN_LEN)
  • DEVICE_CONFIG.POWER_MODE : put device on sleep at pm_runtime ops.
  • TIMER_CONFIG.FS_BURST_AUTO : configure burst avg enable and trigger mode sample rates via channel sampling frequency config.

Overall, the highlight of this device is the monitor capability, leveraged by the autonomous trigger mode and exposed as IIO Event.

Linux driver doc:

HDL: analogdevicesinc/hdl#1504
Datasheet: www.analog.com/ad4052
Tested on Coraz7s

PR Type

  • Bug fix (a change that fixes an issue)
  • New feature (a change that adds new functionality)
  • Breaking change (a change that affects other repos or cause CIs to fail)

PR Checklist

  • I have conducted a self-review of my own code changes
  • I have tested the changes on the relevant hardware
  • I have updated the documentation outside this repo accordingly (if there is the case)

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gastmaier commented Nov 4, 2024

Forced pushed to:

  • Add support to TIMER_CONFIG.FS_BURST_AUTO
  • Only write GP during probe.
  • Simplify IRQ Handler, leave to the user to clear the irq, because:
    • Entering config mode causes the irq to unset.
    • Re-entering monitor mode sets the irq back if still outside the threshold range, causing new handler calls.
    • "Ignoring next interrupt" would generate obnoxious logic.

Forced pushed (2) to:

  • Invert fs_burst_auto array entries, default all devices to 2MSPS (Yes, this value is -EINVAL for ad4056/ad4058, but is the datasheet reset value)

Forced pushed (3) to:

  • Clean-up unused enums.
  • Rename ad405x to ad4052 in the dts

@gastmaier gastmaier force-pushed the staging/ad4052 branch 3 times, most recently from 1f5b827 to 9611c42 Compare November 6, 2024 19:03
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Here it goes first round of review...

I think this one can be upstreamed without the offload bits

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gastmaier

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@gastmaier gastmaier force-pushed the staging/ad4052 branch 2 times, most recently from 4b81da9 to 494d89f Compare November 12, 2024 00:15
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gastmaier commented Nov 12, 2024

Change log v0 -> v1

Review changes:

  • Move functional modes from devicetree entry to different OVERSAMPLING_RATIO values, affecting RAW read and buffered.
  • Documentation YAML fixes, removal of functional mode.
  • Header on alphabetical order.
  • Use field_prep
  • Remove forward declaration, reorder methods instead.
  • Fix cache line aligment.
  • Use devm runtime enable, remove manual remove.
  • Use dev_err_probe
  • General Documentation/.yaml fixes
  • Make all regmap_bulk dma safe.
  • Remove/simplify switch cases where not needed.
  • Instead of using of_node, use spi->irq directly
  • Use regmap update bits.
  • Use fsleep
  • Use oversampling iio property (value 0 is invalid, 1 put on Sample Mode, > 1 Burst Averaging mode)

New:

  • Add regmap access tables

Design changes:

  • Under IIO Event thrshold enabled (device Monitor Mode), return device access busy for every other access, simplifying logic by not requiring exiting and re-entering mode and having an obscure "monitoring downtime" during access.
  • Use oversampling iio prop instead of devicetree entry to switch functional modes.

Documentation/devicetree/bindings/iio/adc/adi,ad4052.yaml Outdated Show resolved Hide resolved
tristate "Analog Devices AD4052 Driver"
depends on SPI
depends on PWM
depends on GPIOLIB
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I'm also not sure if gpio is something you should depend on or just select it. I think the single shot reading could be something useful to have even more to make this driver more upstreamable without offload support (we can still some questions about it though).

tristate "Analog Devices AD4052 Driver"
depends on SPI
depends on PWM
depends on GPIOLIB
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Also one not on the commit message. Style is iio: adc: .... Drop the drivers:

drivers/iio/adc/ad4052.c Show resolved Hide resolved
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drivers/iio/adc/ad4052.c Outdated Show resolved Hide resolved
drivers/iio/adc/ad4052.c Outdated Show resolved Hide resolved
if (val == 0) {
st->mode = AD4052_SAMPLE_MODE;
} else {
st->mode = AD4052_BURST_AVERAGING_MODE;
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I would double check other examples of oversampling. To me this is a 1 or 0 thing. Either it's enabled it not. Your mode variable also just seems to have two states here so the way you're handling val raises some questions.

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The device supports from 2 to 4096 in powers of 2 samples for avg mode.
Decided to reserve 0 and 1 to disable the feature (return to sample mode)

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gastmaier commented Nov 17, 2024

Change log v1 -> v2

Review changes:

  • Include all peripheral properties
  • Drop cnv-gpio description
  • Updated dt-binding commit description
  • Replace d32 array by d16/d32 union (requires ignoring misleading checkpatch warning).
  • Remove MODULE_IMPORT_NS(IIO_AD4052);
  • Add error handling where missing
  • remove {} in single statement ifs, coherent style
  • Use multiple scan masks for changing precision due to oversampling
  • Move all if (st->mode == AD4052_MONITOR_MODE) inside the IIO mutex claim.
  • Drop switches where there is only one channel/event type
  • Remove unused AD4052_AVERAGING_MODE (would require a timed trigger) and AD4052_CONFIG_MODE (implicit mode outside any reading)
  • ad4052_set_avg_filter pass st directly.
  • Use different variables instead of the array for the chip_info

Changes:

  • Use GPIO interrupt instead of PS IRQ
  • All GPIOs are optional, does not require GPIO on KConfig. The user shall bring his own external trigger or short the CS and CNV, for example.
  • Move PWM sampling rate to IIO_ATTR
  • Move ext fs_burst_auto to channel sampling freq
  • Use Data Ready assertions for single shot readings, timeout after 1 second

Extra force push to resolve merge conflict

@gastmaier gastmaier requested a review from nunojsa November 25, 2024 13:20
@gastmaier gastmaier force-pushed the staging/ad4052 branch 2 times, most recently from eb23140 to 0506d4c Compare November 27, 2024 17:18
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Change log v2 -> v3

  • Add "0" (disabled) to oversampling avail list
  • Update iic controller dts address

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nunojsa commented Nov 29, 2024

Change log v2 -> v3

This is not forgotten... I'll try to check it Monday

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Force pushed to resolve merge conflicts due to main rebase.
(minor drivers/iio/adc/Kconfig drivers/iio/adc/Makefile entries )
Then checked with git diff public/main..@

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gastmaier commented Dec 16, 2024

@nunojsa is this version good enough to consider finished?
Should we try to upstream without the offload+pwm parts?
I have a similar driver for another family that uses triggered buffer, but the data rate is much slower + no adjustable buffer sample rate.

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nunojsa commented Dec 17, 2024

@gastmaier,

Sorry for the slow approach on this one...

Should we try to upstream without the offload+pwm parts?

Definitely... But I would even say to maybe wait a few more weeks. We can be close to land spi offload support upstream.

is this version good enough to consider finished?

I'll take a look. Note that CI is failing - maybe due to conflicts with 6.6 merge

drivers/iio/adc/ad4052.c Show resolved Hide resolved
conv_state.period = DIV_ROUND_CLOSEST(NSEC_PER_SEC, freq);
ret = pwm_apply_state(st->cnv_pwm, &conv_state);
if (ret)
return ret;
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#2640 will likely land first so you'll eventually need to adapt to the new API

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Hum hum, rebased on that at https://github.com/analogdevicesinc/linux/tree/staging/ad4052-pwm
V3 -- ad4052-pwm diff:
git range-diff 6948bd2e357d4a316ac0af804a1e7c2bb3165101~..10a85eb73314419f7a5836ae064f51fa097f6101 752ba29b6c6a~..8c423d9fe643

Tested on HW with fsclk 31.2MHz

static IIO_DEVICE_ATTR(sampling_frequency, 0644,
ad4052_buffer_sampling_freq_show,
ad4052_buffer_sampling_freq_store,
0);
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Why not typically read_raw/write_raw approach?

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The IIO_CHAN_INFO_SAMP_FREQ is used for the ADC internal sampling frequency, which resolves to
/sys/bus/iio/devices/iio:device0/sampling_frequency
This one is attached to
/sys/bus/iio/devices/iio:device0/buffer/sampling_frequency

I'll look into this again (for V4?)

drivers/iio/adc/ad4052.c Outdated Show resolved Hide resolved
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drivers/iio/adc/ad4052.c Show resolved Hide resolved
/* Single sample read should be used only for oversampling and
* sampling frequency pairs that take less than 1 sec.
*/
if (st->gp1_irq.enabled) {
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can we do raw reads without the IRQ?

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Without oversampling enabled the raw read may be slower than the gpio CNV to spi transfer,
allowing to do raw reads without the IRQ.
But I will remove this option/use case.
Note: CNV and GP0 (threshold) are still optional.
Note 2: Since CNV is optional, if cnv not present I will yield an empty spi transfer to trigger a conversion (considering the user had shorten CNV to CS)

return PTR_ERR(gpio);

if (gpio) {
irq = gpiod_to_irq(gpio);
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Directly use devm_request_threaded_irq()... i see one the IRQs is for completion but what's the purpose of the other one? We need some comments here I guess

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One is for the threshold IIO event (ad4052_irq_handler_thresh).
The other is drdy for raw read (completion).

I didn't get the comment to directly use devm_request_threaded_irq.
Do you want me to change from a soft interrupt from the GPIO (like ad9081,c) to a hard interrupt (like ad7280a.c)?

} else {
val = ilog2(val);
st->mode = AD4052_BURST_AVERAGING_MODE;
ret = regmap_write(st->regmap, AD4052_REG_AVG_CONFIG, val - 1);
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We should still make sure val is valid right?

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It already bounds the value at AD4052_CHECK_OVERSAMPLING.

Add dt-bindings for AD4052 family, devices AD4050/AD4052/AD4056/AD4058,
low-power with monitor capabilities SAR ADCs.
Contain selectable oversampling and sample rate, the latter for both
oversampling and monitor mode.
The monitor capability is exposed as an IIO threshold either direction
event.

Signed-off-by: Jorge Marques <[email protected]>
The AD4052 CNV pin is driven by a GPIO for single shot readings and
by a PWM for buffer readings.
The functional-mode entry allows to set Sample Mode (0) or Burst
Averaging Mode (1).
During runtime, it is possible to enter Trigger Mode through IIO Events.

Signed-off-by: Jorge Marques <[email protected]>
The AD4052/AD4058/AD4050/AD4056 are versatile, 16-bit/12-bit,
successive approximation register (SAR) analog-to-digital converter (ADC)
that enables low-power, high-density data acquisition solutions without
sacrificing precision.
This ADC offers a unique balance of performance and power efficiency,
plus innovative features for seamlessly switching between high-resolution
and low-power modes tailored to the immediate needs of the system.
The AD4052/AD4058/AD4050/AD4056 are ideal for battery-powered,
compact data acquisition and edge sensing applications.

Signed-off-by: Jorge Marques <[email protected]>
Add entry for the AD4052 ADC family driver.

Signed-off-by: Jorge Marques <[email protected]>
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gastmaier commented Dec 17, 2024

V2 -> V3

  • Rebase
  • Make gp1-gpios required
  • If the user shorten CS with CNV and do not provide cnv-gpio, do empty spi transfer to trigger cnv on raw read.
  • Fix hackish devm_irq_free, disable/enable instead
  • Invert order in postdisable for pwm and irq_enable (related to last bulletpoint)
  • Tune max fsclk frequency

git range-diff 85e9f9a4dc7f85804292d1a0a67c60967282ae53~..204d667060e1f805ce8be96e13bc438d67193b46 f09a86296a9367306b1c653e54e1cb37295923ea~..10a85eb73314419f7a5836ae064f51fa097f6101

Tested on HW at fsclk 31.25MHz (could not achieve datasheet 62.5MHz).

TODO: Solve buffer/sample_freq hack . Wait upstream offload?

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